risc-v

I've been testing a Milk-V Jupiter this week, and have tested a number of other RISC-V development boards over the past two years.

As with any new CPU architecture, software support and ease of adoption are extremely important if you want to reach a wider audience. I wouldn't expect every developer and SBC hobbyist to be able to compile the Linux kernel, and the need to compile much of anything these days is getting rare. So having any instance where one has to know how to tweak a Makefile or pass in different flags to a compiler is a bit of a turn-off for platform adoption.

So one thing I've followed closely is how easy it is for me to get my own software running on RISC-V boards. It's one thing to run some vendor-provided demos. It's another entirely to take my real-world applications and infrastructure apps, and get them to work without hassle.

And to that end, Docker and Ansible, two tools I use extensively for dev/ops work, both run stably—though with plenty of caveats since RISC-V is still so new.

Ansible runs on Python, and Python runs on... well pretty much everything. Including newer RISC-V machines.

But Ansible has a lot of dependencies, and some of these dependencies have caused frustration from time to time on x86 and Arm (so having issues with a dependency is just a way of life when you enter dependency hell)... but in this case, for the past few months, I've never had luck installing Ansible from PyPI (Python's Package Index) on any RISC-V system, using pip install ansible.

I prefer installing this way (rather than compiling from source or from system packages) because it generally gets the latest version of Ansible, with an easy upgrade/downgrade path. It's also easy to add ansible to a Python requirements.txt file and install it alongside other package dependencies.

Regardless, the cryptography library, which requires a Rust compiler to build if the package is not already built for a particular system, has made it difficult to install Ansible from pip:

tl;dr: Sipeed sent a Lichee Console 4A to test. It has a T-Head TH1520 4-core RISC-V CPU that's on par with 2-3 generations-old Arm SBC CPUs, and is in a fun but impractical netbook/cyberdeck form factor. Here's my video on the Lichee Console 4A, and here's all my test data on GitHub.

Last year I tested the StarFive VisionFive 2 and Milk-V Mars CM—both machines ran the JH7110, a 4-core RISC-V SoC that was slower than a Pi 3.

Sipeed introduced the Lichee Pi 4A line of computers, offering a slightly newer T-Head TH1520 SoC, which is also 4-core, but uses faster C910 cores than the JH7110.

tl;dr: No, it's not a replacement for a Raspberry Pi Compute Module 4. But yes, it's an exciting tiny RISC-V board that could be just the ticket for more RISC-V projects, tapping into the diverse ecosystem of existing Compute Module 4 boards.

This tiny computer is the Mars CM. It's the exact same size and shape as the Raspberry Pi Compute Module 4. It should be a drop-in replacement. And on its box it says it supports 4K, Bluetooth and WiFi, and has gigabit Ethernet. It's also supposed to have PCI Express!

Earlier this month, I was able to discuss with Eben Upton (co-founder of Raspberry Pi) the role RISC-V could play in Raspberry Pi's future (among other things—watch the full interview here).

It's risky business fighting Intel, AMD, and Arm, and that's exactly what Star Five is trying to do with this:

The chip on this new single board computer could be the start of a computing revolution—at least that's what some people think!

The VisionFive 2 has a JH7110 SoC on it, sporting a new Instruction Set Architecture (ISA) called RISC-V.