pi 5

The Raspberry Pi 5 includes 5 active PCI Express lanes—4 go to the new RP1 chip for I/O like USB, Ethernet, MIPI Camera and Display, and GPIO, and 1 goes to a new external PCIe connector:

By default, all PCIe lanes operate at Gen 2.0 speeds, or about 5 GT/sec per lane. Currently there's no way to change that default for the RP1 chip's 'internal' lanes, but on the external connector, you can add the following lines inside /boot/firmware/config.txt (and reboot) to upgrade the connection to Gen 3.0 (8 GT/sec, almost double the speed):

It's less than 12 hours since the Pi 5 launch, and already there's a few hundred questions whizzing about—I thought I'd answer some of the things I see people asking most frequently, like:

Does the new Case have room for the Active Cooler, or other Pi HATs?

Yes, indeed it does! You can pop out the fan bracket in the new Case, and fit many normal-size Pi HATs. This is useful also if you want to stack cases—assuming the HAT has mounting points, you could put some spacers in and stack another Pi or Pi + Case on top!

If you haven't heard, the Raspberry Pi 5 was announced today (it'll be available in October).

I have a full video going over the hardware—what's changed, what's new, and what's gone—and I've embedded it below. Scroll beyond to read more about specs, quirks, and some of the things I learned testing a dozen or so PCIe devices with it.